#microcode software

[castle-then]

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[mehsithomas]

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[derriharis]

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[nerdwelt]

Intel behebt einen mysteriösen Patch, der diese Woche für fast alle PCs verfügbar sein wird

Jacob Roach / Digitale Trends Es kommt nicht oft vor, dass Intel einen außerplanmäßigen Patch veröffentlicht, der für fast jeden modernen Prozessor gilt. Aber genau das passiert diesen Freitag. Wie entdeckt von PC WeltChips von 2017 bis zur aktuellen 13. Generation sind im Code für den Patch aufgeführt, der auf veröffentlicht wurde Intel GitHub-Seite. Mit anderen Worten: Wenn Sie einen relativ…

[andmaybegayer]

What are some of the coolest computer chips ever, in your opinion?

Hmm. There are a lot of chips, and a lot of different things you could call a Computer Chip. Here's a few that come to mind as "interesting" or "important", or, if I can figure out what that means, "cool".

If your favourite chip is not on here honestly it probably deserves to be and I either forgot or I classified it more under "general IC's" instead of "computer chips" (e.g. 555, LM, 4000, 7000 series chips, those last three each capable of filling a book on their own). The 6502 is not here because I do not know much about the 6502, I was neither an Apple nor a BBC Micro type of kid. I am also not 70 years old so as much as I love the DEC Alphas, I have never so much as breathed on one.

Disclaimer for writing this mostly out of my head and/or ass at one in the morning, do not use any of this as a source in an argument without checking.

Intel 3101

So I mean, obvious shout, the Intel 3101, a 64-bit chip from 1969, and Intel's first ever product. You may look at that, and go, "wow, 64-bit computing in 1969? That's really early" and I will laugh heartily and say no, that's not 64-bit computing, that is 64 bits of SRAM memory.

This one is cool because it's cute. Look at that. This thing was completely hand-designed by engineers drawing the shapes of transistor gates on sheets of overhead transparency and exposing pieces of crudely spun silicon to light in a """"cleanroom"""" that would cause most modern fab equipment to swoon like a delicate Victorian lady. Semiconductor manufacturing was maturing at this point but a fab still had more in common with a darkroom for film development than with the mega expensive building sized machines we use today.

As that link above notes, these things were really rough and tumble, and designs were being updated on the scale of weeks as Intel learned, well, how to make chips at an industrial scale. They weren't the first company to do this, in the 60's you could run a chip fab out of a sufficiently well sealed garage, but they were busy building the background that would lead to the next sixty years.

Lisp Chips

This is a family of utterly bullshit prototype processors that failed to be born in the whirlwind days of AI research in the 70's and 80's.

Lisps, a very old but exceedingly clever family of functional programming languages, were the language of choice for AI research at the time. Lisp compilers and interpreters had all sorts of tricks for compiling Lisp down to instructions, and also the hardware was frequently being built by the AI researchers themselves with explicit aims to run Lisp better.

The illogical conclusion of this was attempts to implement Lisp right in silicon, no translation layer.

Yeah, that is Sussman himself on this paper.

These never left labs, there have since been dozens of abortive attempts to make Lisp Chips happen because the idea is so extremely attractive to a certain kind of programmer, the most recent big one being a pile of weird designd aimed to run OpenGenera. I bet you there are no less than four members of r/lisp who have bought an Icestick FPGA in the past year with the explicit goal of writing their own Lisp Chip. It will fail, because this is a terrible idea, but damn if it isn't cool.

There were many more chips that bridged this gap, stuff designed by or for Symbolics (like the Ivory series of chips or the 3600) to go into their Lisp machines that exploited the up and coming fields of microcode optimization to improve Lisp performance, but sadly there are no known working true Lisp Chips in the wild.

Zilog Z80

Perhaps the most important chip that ever just kinda hung out. The Z80 was almost, almost the basis of The Future. The Z80 is bizzare. It is a software compatible clone of the Intel 8080, which is to say that it has the same instructions implemented in a completely different way.

This is, a strange choice, but it was the right one somehow because through the 80's and 90's practically every single piece of technology made in Japan contained at least one, maybe two Z80's even if there was no readily apparent reason why it should have one (or two). I will defer to Cathode Ray Dude here: What follows is a joke, but only barely

The Z80 is the basis of the MSX, the IBM PC of Japan, which was produced through a system of hardware and software licensing to third party manufacturers by Microsoft of Japan which was exactly as confusing as it sounds. The result is that the Z80, originally intended for embedded applications, ended up forming the basis of an entire alternate branch of the PC family tree.

It is important to note that the Z80 is boring. It is a normal-ass chip but it just so happens that it ended up being the focal point of like a dozen different industries all looking for a cheap, easy to program chip they could shove into Appliances.

Effectively everything that happened to the Intel 8080 happened to the Z80 and then some. Black market clones, reverse engineered Soviet compatibles, licensed second party manufacturers, hundreds of semi-compatible bastard half-sisters made by anyone with a fab, used in everything from toys to industrial machinery, still persisting to this day as an embedded processor that is probably powering something near you quietly and without much fuss. If you have one of those old TI-86 calculators, that's a Z80. Oh also a horrible hybrid Z80/8080 from Sharp powered the original Game Boy.

I was going to try and find a picture of a Z80 by just searching for it and look at this mess! There's so many of these things.

I mean the C/PM computers. The ZX Spectrum, I almost forgot that one! I can keep making this list go! So many bits of the Tech Explosion of the 80's and 90's are powered by the Z80. I was not joking when I said that you sometimes found more than one Z80 in a single computer because you might use one Z80 to run the computer and another Z80 to run a specialty peripheral like a video toaster or music synthesizer. Everyone imaginable has had their hand on the Z80 ball at some point in time or another. Z80 based devices probably launched several dozen hardware companies that persist to this day and I have no idea which ones because there were so goddamn many.

The Z80 eventually got super efficient due to process shrinks so it turns up in weird laptops and handhelds! Zilog and the Z80 persist to this day like some kind of crocodile beast, you can go to RS components and buy a brand new piece of Z80 silicon clocked at 20MHz. There's probably a couple in a car somewhere near you.

Pentium (P6 microarchitecture)

Yeah I am going to bring up the Hackers chip. The Pentium P6 series is currently remembered for being the chip that Acidburn geeks out over in Hackers (1995) instead of making out with her boyfriend, but it is actually noteworthy IMO for being one of the first mainstream chips to start pulling serious tricks on the system running it.

The P6 microarchitecture comes out swinging with like four or five tricks to get around the numerous problems with x86 and deploys them all at once. It has superscalar pipelining, it has a RISC microcode, it has branch prediction, it has a bunch of zany mathematical optimizations, none of these are new per se but this is the first time you're really seeing them all at once on a chip that was going into PC's.

Without these improvements it's possible Intel would have been beaten out by one of its competitors, maybe Power or SPARC or whatever you call the thing that runs on the Motorola 68k. Hell even MIPS could have beaten the ageing cancerous mistake that was x86. But by discovering the power of lying to the computer, Intel managed to speed up x86 by implementing it in a sensible instruction set in the background, allowing them to do all the same clever pipelining and optimization that was happening with RISC without having to give up their stranglehold on the desktop market. Without the P5 we live in a very, very different world from a computer hardware perspective.

From this falls many of the bizzare microcode execution bugs that plague modern computers, because when you're doing your optimization on the fly in chip with a second, smaller unix hidden inside your processor eventually you're not going to be cryptographically secure.

RISC is very clearly better for, most things. You can find papers stating this as far back as the 70's, when they start doing pipelining for the first time and are like "you know pipelining is a lot easier if you have a few small instructions instead of ten thousand massive ones.

x86 only persists to this day because Intel cemented their lead and they happened to use x86. True RISC cuts out the middleman of hyperoptimizing microcode on the chip, but if you can't do that because you've girlbossed too close to the sun as Intel had in the late 80's you have to do something.

The Future

This gets us to like the year 2000. I have more chips I find interesting or cool, although from here it's mostly microcontrollers in part because from here it gets pretty monotonous because Intel basically wins for a while. I might pick that up later. Also if this post gets any longer it'll be annoying to scroll past. Here is a sample from a post I have in my drafts since May:

I have some notes on the weirdo PowerPC stuff that shows up here it's mostly interesting because of where it goes, not what it is. A lot of it ends up in games consoles. Some of it goes into mainframes. There is some of it in space. Really got around, PowerPC did.

[microcode0]

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[davidharish]

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[govindhtech]

How Caliptra OCP Bolsters Data Center Chip Security

Caliptra security

At Google, create technology and software that is scalable, secure, and sustainable in order to power services for billions of users. To provide these experiences, they have made open innovation a fundamental principle. CPUs, GPUs, TPUs, NICs, SSDs, and more will work together in an AI-driven future. These chips’ firmware must be transparent and trusted to enable secure solutions at scale.

Greetings from Caliptra 1.0

In order to improve chip security, Google collaborated with AMD, Microsoft, and NVIDIA to create the Caliptra standard at the Open Compute Project (OCP). Caliptra is a hardware root-of-trust (RoT) that helps guarantee that only approved and reliable firmware is permitted to execute production workloads by offering verifiable cryptographic assurances.

Caliptra will eventually cover all chips, with an initial focus on hardware implementations used in secret computing. The team went above and beyond a defined specification to produce an open-source implementation at the CHIPS Alliance in response to the increasingly sophisticated nature of cyberattacks. The end product is an intellectual property (IP) block at the silicon level that can be included into CPUs, GPUs, and SSDs in the future. The block’s firmware and ROM are likewise covered by the Caliptra source code.

Google cloud is happy to announce the completion of the Caliptra definition and the reaching of the revision 1.0 milestone for the open-source hardware and software implementation. With the addition of 9elements, AMI, Antmicro, ASPEED, Axiado, Lubis EDA, ScaleFlux, Marvell, and Nuvoton, the Caliptra community is still expanding and currently consists of organisations with substantial domain experience in SoC design automation, firmware, and verification.

Companies around the ecosystem are currently integrating the Caliptra IP block onto chips that will begin to be sold in 2026. We have gone from the beginning of the project to a complete specification and an open-source implementation of the hardware and software in less than two years.

The group has already begun work on Caliptra 2.0’s next version, which will address quantum cryptography in order to adhere to NIST’s guidelines for stateful hash-based signature schemes and module-lattice-based digital signatures. Visit caliptra.io to view the open source repositories and download the Caliptra 1.0 standard.

Caliptra OCP

OCP Safe and Effective Environment

Additionally, OCP, Microsoft, and Google are working together to improve security assessments through the OCP Security Appraisal Framework for Enablement (OCP S.A.F.E.). Customers of equipment like SSDs can be assured of security conformity with this programme. In order to protect the intellectual property of device vendors, the programme has certified a list of authorised OCP Security Review Providers (SRPs) who perform security conformance reviews to guarantee the provenance, code quality, and software supply chain for firmware releases and patches for devices. Information about OCP’s S.A.F.E. programme.

The S.A.F.E. Programme (OCP Security Appraisal Framework and Enablement)

A vast array of processing (CPU, GPU, FPGA, etc.) and peripheral (network controllers, accelerators, storage devices, etc.) components make up modern data centres. Typically, these devices are powered by firmware, microcode, or updateable software that can be found either outside or inside.

Strong security assurance is needed for the software supply chain, provenance, and code quality of firmware releases and updates that are installed on these devices.

Objectives: The OCP S.A.F.E. Recognition Programme aims to tackle the difficulties that device manufacturers, consumers, and outside security assessment companies are currently facing, such as:

Cut down on overhead and duplicate security audits.

Give customers of devices an assurance of security conformity.

Reduce rival arguments that impede the sharing of source code for thorough, impartial security testing and the publication of results and reports.

Expand the number of devices that have their firmware and related updates continuously examined.

Refine review areas, testing scopes, and reporting criteria iteratively to gradually improve hardware and firmware component security posture throughout the supply chain.

How to Take Part

Image credit to google cloud

OCP Caliptra

If you belong to the Device Supplier

First Step

Enrol in the OCP Solution Provider Programme and become an OCP Member.

Step Two

Examine the documentation for the Framework and Review Areas.

Select a certified OCP Security Review Provider (SRP) from a list to carry out a security conformance review.

Step Three

The OCP SRP will submit the security compliance report to the OCP (sample report link), at which point the device will be placed on the OCP Marketplace and recognised as an OCP S.A.F.E. approved product.

The relevant OCP S.A.F.E. logos for usage with the device will be provided by OCP.

Use the OCP go-to-market initiatives to your advantage and start marketing the product as OCP S.A.F.E.

If your business wants to become a third-party auditor and an OCP Security Review Provider (SRP) Solution Provider:

First Step

Examine the documentation for the SRP Framework and Criteria.

To explore submitting an SRP application, get in touch with the OCP Community S.A.F.E. Project Leads.

Step Two

Security Project Leads and the OCP Foundation will examine the SRP Criteria Assessment.

Sign the appropriate contracts and make the necessary payments.

The SRP will be known as an OCP S.A.F.E. SRP if it is authorised.

Step Three

The OCP Membership and Solution Provider (SP) Directories will list SRP.

Range

The following will be the Security Project’s main priorities

Standardised hardware interface and protocols to guarantee the integrity of the boot code

For specialised security hardware, open-source firmware

Security firmware protocols and APIs

Ownership transfer of the IT equipment (e.g., resale)

Techniques for delivering firmware security

Firmware and operating system secure boot

Recuperation from a weakened or distrusted state

Ensuring the safety and accuracy of any changeable storage, such as flash for microcontrollers, BMCs, BIOS, CPLDs, etc.

Safe changes to changeable storage with flexible options for rollback protection

What is about to happen

Caliptra has already established itself as a superior specification and implementation that tackles a challenging issue related to security. Additionally, they building on it with the launch of OCP Layered Open-source Cryptographic Key-management (OCP L.O.C.K.), a new endeavour. A standard for NVM Express (NVMe) key management blocks is defined and implemented by OCP L.O.C.K., which was founded by Google, Microsoft, Samsung, Solidigm, and KIOXIA. This standard protects customer data even in the event that a physical drive is taken from a data centre.

Joining forces with industry experts to produce technologies that will increase the trustworthiness and security of society’s infrastructure is exciting. Open source is used as a means to help hardware, firmware, and software meet the standards’ goals in an open, auditable, and transparent manner. Caliptra, OCP S.A.F.E., and OCP L.O.C.K. are among the topics covered in further detail during this week’s OCP Regional Summit in Lisbon, Portugal. they excited to talk about these technologies and work together to create the future.

Read more on govindhtech.com

[softwaredevelopment123]

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[williamkane1]

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[castle-then]

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[mehsithomas]

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[derriharis]

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[michel-joseph]

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[risabhtiwari]

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[microcode0]

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