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Intel’s Silicon Mobility OLEA U310 SoC Boosts EV Progress

Silicon Mobility OLEA U310

One of the main obstacles to purchasing an electric vehicle (EV) is still its expensive cost, which deters many prospective consumers worldwide. Due in large part to the high expense of developing improved battery and e-motor technologies, electric vehicles (EVs) are now more expensive to construct than conventional gasoline-powered vehicles. Improving the efficiency of current battery technology at the vehicle level through energy savings and better interaction with EV station infrastructure is the short-term solution.

With the release of the new OLEA U310 system-on-chip (SoC) today, Silicon Mobility, an Intel company, has successfully addressed this precise difficulty. The entire performance of electric cars (EVs) will be greatly enhanced by this next-generation technology, which will also expedite the design and production processes and expand SoC services to guarantee smooth operation across a variety of EV station platforms.

Mobility in Silicon

The new SoC, which is a first for the industry, is the first all-in-one solution that combines software and hardware, and it is designed to meet the requirements of distributed software-based electrical architectures for powertrain domain control. With its distinct hybrid and heterogeneous architecture, the OLEA 310 FPCU can take the place of up to six conventional microcontrollers in a system configuration that includes an on-board charger, a gearbox, an inverter, a motor, and a DC-DC converter. Original equipment manufacturers (OEMs) and Tier 1 suppliers can regulate a variety of power and energy functions simultaneously and in real time with the 310 FPCU.

Create a function grouping for your e-powertrain

The OLEA U310 is a recent addition to the Silicon Mobility FPCU line. Its design matches distributed software requirements for powertrain domain control in electrical/electronic designs. Beyond the capabilities of conventional microcontrollers, the OLEA U310 is constructed with a novel hybrid and heterogeneous architecture that embeds numerous software and hardware programmable processing and control units seamlessly integrating functional safety and the cybersecurity into its fundamental design. It hosts and connects, on a single chip, the essential event-based multifunction control requirements with the time-based and multitask software application needs.

Created with the newest demands in automobile control in mind

The OLEA U310 can do more than only powertrain tasks. Additional uses for this adaptable system-on-a-chip include:

Systems for Chassis Control

Fusion of Data

Compressor air

System for Thermal Management

Different Control Mechanisms

EV makers may create a more integrated and effective control system that improves control and performance by utilising the adaptability of the OLEA U310.

Authority of the AxEC

For direct sensor and actuator interfacing, the Advanced eXecution & Event Control (AxEC) unit integrates programmable hardware, mathematical coprocessors, and adjustable peripherals. The core of the FPCU architecture is the programmable hardware known as the Flexible Logic Units (FLU). It is a programmable logic fabric that can be designed using common hardware description languages like Verilog or VHDL. It is furnished with flip-flops, SRAM, lookup tables, and signal processing units. 1-4 FLU partitions are a notion that is introduced by the OLEA U Series.

CPUs are in charge of high-level and low-response-time software, while AxEC deals with real-time control and fast-response processing. For particular jobs, designers have the option of using CPU or AxEC; nevertheless, AxEC usually performs sophisticated processing, minimising CPU utilisation. Regardless of the number or frequency of events, hardware processing guarantees prompt, accurate responses.

Protected by OLEA SiLant

The greatest level of automotive safety integrity specified by the ISO 26262 functional safety standard, ASIL-D design ready, is met by the FPCU. The OLEA U Series Safety Integrity Agent (SiLant) is in charge of identifying, containing, and responding to errors in nanoseconds. It is the key hub for all safety measures integrated within the FPCU. SiLant detects software and system faults in addition to latent and transient faults at the semiconductor level.

OLEA U FLU provides safe multitasking and function grouping with unified firmware virtualization from CPU down to FLU level with the advent of multi-CPU and multi-FLU. OLEA U offers assurances and a deterministic architecture. Worst-Scene Performance It’s time to create applications that require safety.

Protected by OLEA FHSM

For the best defence against current and potential threats, the latest generation of FPCU is available. A subsystem integrated into the OLEA U Series that complies with the ISO 21434 automotive cybersecurity standard and EVITA Full is called the Flexible Hardware Security Module (FHSM). Its specialised programmable hardware allows it to contain hardware-accelerated security functions that can be used to improve protection or keep an eye out for any system security breaches. This special feature makes use of a wider range of cryptographic techniques to enable safe real-time communications as well as secure software updates and execution.

Mobility of Silicon

Together with the bill of material (BoM) reduction, preliminary data indicates that compared to current EVs, there will be a 5% increase in energy efficiency, a 25% reduction in motor size for the same power, a 35% decrease in cooling requirements, and a 30% reduction in passive component size. With fewer components to incorporate, the new Silicon Mobility technology enables EV makers to develop software-defined electric vehicles with superior performance, increased range, and potentially cheaper production costs. The industry’s transition to an all-electric and software-defined future will be accelerated by the new solution, which also enhances Intel Automotive’s current line of AI-enhanced software-defined vehicle (SDV) SoCs.

Silicon Mobility OLEA U310 Features

2nd generation of FPCU

3x Cortex-R52 @ 350MHz – 2196 DMIPS

AxEC 2.0: 2x FLUs @ 175Mhz – 400 GOPS + 9.1 GMAC

SILant 2.0: Safe and Determinist Multi-Core/FLU

Flexible HSM: HW & SW EVITA Full

8MB of P-Flash, 256kB of D-Flash, 1MB of SRAM

CAN FD, CAN XL, Ethernet

ISO/SAE 21434 certifieISO 26262 ASIL-D & ISO/SAE 21434 compliant

AEC-Q100 Grade 1

292 BGA

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