#Off The Wire – HPCwire

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EuroHPC’s Deucalion Inaugurated in Portugal, Boosting European High-Performance Computing Sept. 6, 2023 — This week, Deucalion, the European High Performance Computing Joint Undertaking (EuroHPC JU) supercomputer located in Portugal, was inaugurated by the Portuguese Prime Minister Antonio Costa at […] The post EuroHPC’s Deucalion Inaugurated in Portugal, Boosting European High-Performance Computing appeared first on HPCwire. https://www.hpcwire.com/off-the-wire/eurohpcs-deucalion-inaugurated-in-portugal-boosting-european-high-performance-computing/

[nonviable-hostage]

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[muzaffar1969]

http://bit.ly/2IwQjnq

Unisys Names Lisa A. Hook to Board of Directors  HPCwire

BLUE BELL, Pa., Jan. 24, 2019 — Unisys Corporation has announced that Lisa A. Hook has been elected to the Unisys board of directors, effective February 15, ...

January 24, 2019 at 08:15PM From: http://bit.ly/2RPUVOv

[mthrynn]

TOKYO, Dec. 11, 2017 — Fujitsu Laboratories Ltd. today announced the development of WAN acceleration technology that can deliver transfer speeds up to 40Gbps for migration of large volumes of data between clouds, using servers equipped with field-programmable gate arrays (FPGAs).

Connections in wide area networks (WANs) between clouds are moving from 1Gbps lines to 10Gbps lines, but with the recent advance of digital technology, including IoT and AI, there is an even greater demand for faster high-speed data transfers as huge volumes of data are collected in the cloud. Until now the effective transfer speed of WAN connections has been raised using techniques to reduce the volume of data, such as compression and deduplication. However, with WAN lines of 10Gbps there are enormous volumes of data to be processed, and existing WAN acceleration technologies usable in cloud servers have not been able to sufficiently raise the effective transfer rate.

Fujitsu Laboratories has now developed WAN acceleration technology capable of real-time operation even with speeds of 10Gbps or higher. WAN acceleration technology is achieved with a dedicated computational unit specialized for a variety of processing, such as feature value calculations and compression processing, mounted onto an FPGA equipped on a server, and in tandem with this, by enabling highly parallel operation of the computational units by supplying data at the appropriate times based on the predicted completion of each computation.

In a test environment where this technology was deployed on servers that use FPGAs, and where the servers were connected with 10Gbps lines, Fujitsu Laboratories confirmed that this technology achieved effective transfer rates of up to 40Gbps, the highest performance in the industry. With this technology, it has become possible to transfer data at high-speeds between clouds, including data sharing and backups, enabling the creation of next-generation cloud services that share and utilize large volumes of data across a variety of companies and locations.

Fujitsu Laboratories aims to deploy this technology, capable of use in cloud environments, as an application loaded on an FPGA-equipped server. It is continuing evaluations in practical environments with the goal of commercializing this technology during fiscal 2018.

Fujitsu Laboratories will announce details of this technology at the 2017 International Conference on Field-Programmable Technology (FPT 2017), an international conference to be held in Melbourne, Australia on December 11-13.

Development Background

As the cloud has grown in recent years, there has been a movement to increase data and server management and maintenance efficiency by migrating data (i.e., internal documents, design data, and email) that had been managed on internal servers to the cloud. In addition, as shown by the spread in the use of digital technology such as IoT and AI, there are high expectations for the ways that work and business will be transformed by the analysis and use of large volumes of data, including camera images from factories and other on-site locations, and log data from devices. Given this, there has been explosive growth in the volume of data passing through WAN lines between clouds, spurring a need for next-generation WAN acceleration technology capable of huge data transfers at high-speed between clouds.

Issues

WAN acceleration technologies improve effective transfer speeds by reducing the volume of data through compression or deduplication of the data to be transferred. When transferring data at even higher speeds using 10Gbps network lines, the volume of data needing to be processed is so great that the compression and deduplication processing speed in the server bottlenecks. Therefore, in order to improve real-time operation, there is a need for either CPUs that can operate at higher speeds, or for WAN acceleration technology with faster processing speeds.

About the Newly Developed Technology

Fujitsu Laboratories has now developed WAN acceleration technology that can achieve real-time operation usable in the cloud even with speeds of 10Gbps or more, using server-mounted FPGAs as accelerators. Efficient operations with WAN acceleration technology are accomplished by using an FPGA to process a portion of the processing for which the computation is heavy and for which it is difficult to improve processing speed in the CPU, when performing compression or deduplication for WAN acceleration processing, and by efficiently connecting the CPU with the FPGA accelerator. Details of the technology are as follows.

1. FPGA parallelization technology using highly parallel dedicated computational units

Fujitsu Laboratories has developed FPGA parallelization technology that can significantly reduce the processing time required for data compression and deduplication by deploying dedicated computational units specialized for data partitioning, feature value calculation, and lossless compression processing in a FPGA in a highly parallel configuration, and by enabling highly parallel operation of the computational units by delivering data at the appropriate times based on predictions of the completion of each calculation.

2. Technology to optimize the flow of processing between CPU and FPGA

Previously, in determining whether to apply lossless compression to data based on the identification of duplication in that data, it was necessary to read the data twice, both before and after the duplication identification was executed on the FPGA, increasing overhead and preventing the system from delivering sufficient performance. Now, by consolidating the processing handoff onto the FPGA, handling both the preprocessing for duplication identification and the compression processing on the FPGA, and using a processing sequence that controls how the compression processing results are reflected on the CPU based on the results of the duplication identification, this technology reduces the overhead between the CPU and FPGA from reloading the input data and from control exchanges. This reduces the waiting time due to the handoff of data and control between the CPU and FPGA, delivering efficient coordinated operation of the CPU and FPGA accelerator.

Effects

Fujitsu Laboratories deployed this newly developed technology in servers installed with FPGAs, confirming acceleration approximately thirty times the performance of CPU processing alone. Fujitsu Laboratories evaluated the transfer speed for a high volume of data in a test environment where the servers were connected with 10Gbps connections, and in a test simulating the regular backup of data, including documents and video, confirmed that this technology achieved transfer speeds up to 40Gbps, an industry record. This technology has significantly improved data transfer efficiency over WAN connections, enabling high-speed data transfers between clouds, such as data sharing and backups, making possible the creation of next-generation cloud services that share and use large volumes of data between a variety of companies and locations.

Future Plans

Fujitsu Laboratories will continue to evaluate this technology in practical environments, deploying this technology in virtual appliances that can be used in cloud environments. Fujitsu Laboratories aims to make this technology available as a product of Fujitsu Limited during fiscal 2018.

About Fujitsu Laboratories

Founded in 1968 as a wholly owned subsidiary of Fujitsu Limited, Fujitsu Laboratories Ltd. is one of the premier research centers in the world. With a global network of laboratories in Japan, China, the United States and Europe, the organization conducts a wide range of basic and applied research in the areas of Next-generation Services, Computer Servers, Networks, Electronic Devices and Advanced Materials. For more information, please see: http://ift.tt/1yxOfVGgroup/labs/en/.

About Fujitsu Ltd

Fujitsu is a leading Japanese information and communication technology (ICT) company, offering a full range of technology products, solutions, and services. Approximately 155,000 Fujitsu people support customers in more than 100 countries. We use our experience and the power of ICT to shape the future of society with our customers. Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.5 trillion yen (US$40 billion) for the fiscal year ended March 31, 2017. For more information, please seehttp://www.fujitsu.com.

Source: Fujitsu Ltd

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[yogeshmalik]

DDN Accelerating Data Storage in 7th Ranked NVIDIA Supercomputer - HPCwire https://ift.tt/2YPEPpZ

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Multiverse Computing and Iberdrola Collaborate on Quantum Solutions for Future-Ready Smart Grids SAN SEBASTIAN, Spain, July 6, 2023 — Multiverse Computing, a global leader in value-based quantum computing solutions, today announced a joint project with multinational clean energy firm Iberdrola to modernize […] The post Multiverse Computing and Iberdrola Collaborate on Quantum Solutions for Future-Ready Smart Grids appeared first on HPCwire. https://www.hpcwire.com/off-the-wire/multiverse-computing-and-iberdrola-collaborate-on-quantum-solutions-for-future-ready-smart-grids/

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BSC Develops Pioneering AI Method to Fight Urban Air Pollution April 25, 2023 — Ninety-nine percent of the world’s population breathes air that exceeds the limits recommended by the World Health Organization. This scenario is exacerbated in urban areas where more […] The post BSC Develops Pioneering AI Method to Fight Urban Air Pollution appeared first on HPCwire. https://www.hpcwire.com/off-the-wire/bsc-develops-pioneering-ai-method-to-fight-urban-air-pollution/

[mthrynn]

BEAVERTON, Ore., Dec. 6, 2017 — The Heterogeneous System Architecture (HSA) Foundation today released key findings from a second comprehensive members survey. The survey reinforced why heterogeneous architectures are becoming integral for future electronic systems.

HSA is a standardized platform design supported by more than 70 technology companies and universities that unlocks the performance and power efficiency of the parallel computing engines found in most modern electronic devices. It allows developers to easily and efficiently apply the hardware resources—including CPUs, GPUs, DSPs, FPGAs, fabrics and fixed function accelerators—in today’s complex systems-on-chip (SoCs).

Some of the survey questions – and results:

Will the system have HSA features? 

Last year, 58.82% of the respondents answered affirmatively; this year, 100%!

Will it be HSA-compliant?

In 2016, 69.23% said it would; 2017 figures rose to 80%.

What is the top challenge in implementing heterogeneous systems?

27.27% responded in 2016 that it was a lack of standards for software programming models; the 2017 survey also identified this as the most important issue, but the numbers decreased to 7.69%.

What is the top challenge in implementing heterogeneous systems?

Half of the respondents last year said it was a lack of developer ecosystem momentum.  Once again this was identified as the key issue.

Some remarks that further accentuate key survey findings:

“Many HSA Foundation members are currently designing, programming or delivering a wide range of heterogeneous systems – including those based on HSA,” said HSA Foundation President Dr. John Glossner. “Our 2017 survey provides additional insight into key issues and trends affecting these systems that power the electronic devices across every aspect of our lives.”

Greg Stoner, HSA Foundation Chairman and Managing Director said that “the Foundation is developing resources and ecosystems conducive to its members’ various focuses on different application areas, including machine learning, artificial intelligence, datacenter, embedded IoT, and high-performance computing. The Foundation has also been making progress in support of these ecosystems, getting closer to taking normal C++ code and compiling to an HSA system.”

Stoner added that “ROCm 7 by AMD will port HSA for Caffe and TensorFlow; GPT, in the meantime, is releasing an open-sourced HSAIL-based Caffe library, with the first version already up and running – this permits early access for developers.”

Dr. Xiaodong Zhang, from Huaxia General Processor Technologies, who serves as chairman of the China Regional Committee (CRC; established by the HSA Foundation to enhance global awareness of heterogeneous computing), said that “China’s semiconductor industry is rapidly developing, and the CRC is building an ecosystem in the region to include technology, talent, and markets together with an open approach to take advantage of synergies among industry, academia, research, and applications.”

About the HSA Foundation

The HSA (Heterogeneous System Architecture) Foundation is a non-profit consortium of SoC IP vendors, OEMs, Academia, SoC vendors, OSVs and ISVs, whose goal is making programming for parallel computing easy and pervasive. HSA members are building a heterogeneous computing ecosystem, rooted in industry standards, which combines scalar processing on the CPU with parallel processing on the GPU, while enabling high bandwidth access to memory and high application performance with low power consumption. HSA defines interfaces for parallel computation using CPU, GPU and other programmable and fixed function devices, while supporting a diverse set of high-level programming languages, and creating the foundation for next-generation, general-purpose computing.

Source: HSA Foundation

The post Survey from HSA Foundation Highlights Importance, Benefits of Heterogeneous Systems appeared first on HPCwire.

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[mthrynn]

SUNNYVALE, Calif. & YOKNEAM, Israel, Dec. 4, 2017 — Mellanox Technologies, Ltd. (NASDAQ: MLNX), a leading supplier of high-performance, end-to-end smart interconnect solutions for data center servers and storage systems, today announced in collaboration with NEC Corporation support for the newly announced SX-Aurora TSUBASA systems with Mellanox ConnectX InfiniBand adapters. A typical Aurora server platform includes from one to four InfiniBand adapters. The top-of-the-line Aurora platform utilizes 32 ConnectX adapters to support 64 vector engines in a single system. The NEC SX-Aurora TSUBASA systems leverage general-purpose vector-based NEC coprocessors and Mellanox in-network computing interconnect accelerators to achieve the highest application performance and scalability.

“We appreciate the performance, efficiency and scalability advantages that Mellanox interconnect solutions bring to our platform,” said Shigeyuki Aino, assistant general manager system platform business unit, IT platform division, NEC Corporation. “The in-network computing and PeerDirect capabilities of InfiniBand are the perfect complement to the unique vector processing engine architecture we have designed for our SX-Aurora TSUBASA platform.”

“Mellanox is proud to work with NEC to enable a next-generation computational platform for high-performance computing, machine learning, cloud and more,” said Gilad Shainer, vice president of marketing at Mellanox Technologies. “The combination of Mellanox ConnectX adapters, in-network computing, and acceleration engines, with NEC vector processing, provides our users with a world-leading compute platform that enables the highest application performance and the best return on investment.”

Mellanox InfiniBand solutions deliver the highest efficiency for high performance, artificial intelligence, cloud, storage and more infrastructures. InfiniBand accelerates all of the compute architectures – X86, Power, GPU, ARM, FPGA and Vector-based compute and storage platforms – delivering highest flexibility and best return on investment.

About Mellanox

Mellanox Technologies (NASDAQ: MLNX) is a leading supplier of end-to-end InfiniBand and Ethernet smart interconnect solutions and services for servers and storage. Mellanox interconnect solutions increase data center efficiency by providing the highest throughput and lowest latency, delivering data faster to applications and unlocking system performance capability. Mellanox offers a choice of fast interconnect products: adapters, switches, software and silicon that accelerate application runtime and maximize business results for a wide range of markets including high performance computing, enterprise data centers, Web 2.0, cloud, storage and financial services. More information is available at: www.mellanox.com.

Source: Mellanox

The post Mellanox and NEC Partner to Deliver Innovative High-Performance and Artificial Intelligence Platforms appeared first on HPCwire.

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[mthrynn]

ALISO VIEJO, Calif., Nov. 30, 2017 — Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the availability of its Libero system-on-chip (SoC) PolarFire version 2.0 comprehensive design software tool suite, used for the development of the company’s lowest power, cost-optimized mid-range PolarFire field programmable gate array (FPGAs) and supporting all PolarFire FPGA family devices and packages.

Microsemi’s Libero SoC PolarFire Design Suite provides a complete design environment for customers working on designs requiring high-speed transceivers and memories with low power consumption. It enables high productivity with its comprehensive, easy to learn, easy to adopt development tools and enables a design launching point for customers with key quick start demonstration designs for rapid evaluation and prototyping. Several full design files for Libero SoC PolarFire targeting the company’s complementary PolarFire Evaluation Kit are also available, including JESD204B Interface, PCI Express (PCIe) Endpoint, 10GBASE-R Ethernet, digital signal processing (DSP) finite impulse response (FIR) filter and multi-rate transceiver demonstration, with additional reference designs planned over the coming months.

“Our Libero SoC PolarFire v2.0 release supports all of the PolarFire product family’s devices and packages, enabling customers to further leverage the high-performance capabilities of our lowest power, cost-optimized mid-range FPGAs for their designs,” said Jim Davis, vice president of software engineering at Microsemi. “Feature enhancements to best-in-class debug tool SmartDebug provide the ability to evaluate transceiver performance while modifying transceiver lane signal integrity parameters on the fly, and to evaluate the channel noise of the transceiver receiver through the eye monitor. In addition, the demonstration mode allows customers to evaluate SmartDebug features without connecting to a hardware board—a capability unique to Microsemi FPGAs.”

The enhanced design suite also includes significant runtime improvement for SmartPower, with a 4x speed up of invocation time and almost instantaneous switching between different views. In addition, Libero SoC PolarFire v2.0 introduces a brand new SmartDesign canvas with higher quality, higher speed of displaying nets and easier design navigation.

While Microsemi’s PolarFire FPGAs are ideal for a wide variety of applications within the communications, industrial and aerospace and defense markets, the new software provides new capabilities for high-speed applications, offering particular suitability for access networks, wireless infrastructure, and the defense and industry 4.0 markets. Application examples include wireline access, network edge, wireless heterogeneous networks, wireless backhaul, smart optical modules, video broadcasting, encryption and root of trust, secure wireless communications, radar and electronic warfare (EW), aircraft networking, actuation and control.

With the release of Libero SoC PolarFire v2.0, Microsemi has added support for PolarFire MPF100, MPF200, MPF300 and MPF500 devices for all package options, enabling customers to design with all members of the PolarFire family. It also adds the MPF300TS-FCG484 (STD) device to Libero Gold License and introduces the MPF100T device supported by the free Libero Silver License.

Microsemi’s PolarFire FPGA devices provide cost-effective bandwidth processing capabilities with the lowest power footprint. They feature 12.7 Gbps transceivers and offer up to 50 percent lower power than competing mid-range FPGAs, and include hardened PCIe controller cores with both endpoints and root port modes available, as well as low power transceivers. The company’s complementary PolarFire Evaluation Kit is a comprehensive platform for evaluating its PolarFire FPGAs which includes a PCIe edge connector with four lanes and a demonstration design. The kit features a high-pin-count (HPC) FPGA mezzanine card (FMC), a single full-duplex lane of surface mount assemblies (SMAs), PCIe x4 fingers, dual Gigabit Ethernet RJ45 and a small form-factor pluggable (SFP) module.

Availability

Microsemi’s Libero SoC PolarFire v2.0 software toolset is now available for download from Microsemi’s website at http://ift.tt/2App8up and its PolarFire FPGA devices are available for engineering sample ordering with standard lead times. For more information, visit http://ift.tt/2AqmapB and http://ift.tt/2lQF6DQ or email sales.support@microsemi.com.

About PolarFire FPGAs

Microsemi’s new cost-optimized PolarFire FPGAs deliver the industry’s lowest power at mid-range densities with exceptional security and reliability. The product family features 12.7 Gbps transceivers and offer up to 50 percent lower power than competing FPGAs. Densities span from 100K to 500K logic elements (LEs) and are ideal for a wide range of applications within wireline access networks and cellular infrastructure, defense and commercial aviation markets, as well as industry 4.0 which includes the industrial automation and internet of things (IoT) markets.

PolarFire FPGAs’ transceivers can support multiple serial protocols, making the products ideal for communications applications with 10Gbps Ethernet, CPRI, JESD204B, Interlaken and PCIe. In addition, the ability to implement serial gigabit Ethernet (SGMII) on GPIO enables numerous 1Gbps Ethernet links to be supported. PolarFire FPGAs also contain the most hardened security intellectual property (IP) to protect customer designs, data and supply chain. The non-volatile PolarFire product family consumes 10 times less static power than competitive devices and features an even lower standby power referred to as Flash*Freeze. For more information, visit http://ift.tt/2lQF6DQ.

About Microsemi

Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com.

Source: Microsemi

The post Microsemi Announces Libero SoC PolarFire v2.0 for Designing With its Mid-Range FPGAs appeared first on HPCwire.

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[mthrynn]

DENVER, Nov. 16, 2017 — Xilinx, Inc. (XLNX) and Huawei Technologies Co., Ltd. today jointly announced the North American debut of the Huawei FPGA Accelerated Cloud Server (FACS) platform at SC17. Powered by Xilinx high performance Virtex UltraScale+ FPGAs, the FACS platform is differentiated in the marketplace today.

Launched at the Huawei Connect 2017 event, the Huawei Cloud provides FACS FP1 instances as part of its Elastic Compute Service. These instances enable users to develop, deploy, and publish new FPGA-based services and applications through easy-to-use development kits and cloud-based EDA verification services. Both expert hardware developers and high-level language users benefit from FP1 tailored instances suited to each development flow.

The interactive demonstration at SC17 illustrates the large performance advantage of the Huawei FACS platform compared to an HPC class CPU-based platform through a video encoding and a compression scenario. Highlighted demos from NGCodec and DeePhi feature video encoding and deep learning capabilities, respectively. The FP1 demonstrations feature Xilinx technology which provides a 10-100x speed-up for compute intensive cloud applications such as data analytics, genomics, video processing, and machine learning. Huawei FP1 instances are equipped with up to eight Virtex UltraScale+ VU9P FPGAs and can be configured in a 300G mesh topology optimized for performance at scale. Both the cloud service and the platform technology for on premise solutions are highlighted in the demonstration.

The FP1 FPGA accelerated cloud service is available on the Huawei Public Cloud today. To register for the public beta, please visit http://ift.tt/2eKJPbo.

About Huawei 

Huawei is a leading global information and communications technology (ICT) solutions provider. Our aim is to enrich life and improve efficiency through a better connected world, acting as a responsible corporate citizen, innovative enabler for the information society, and collaborative contributor to the industry. Driven by customer-centric innovation and open partnerships, Huawei has established an end-to-end ICT solutions portfolio that gives customers competitive advantages in telecom and enterprise networks, devices and cloud computing. Huawei’s 180,000 employees worldwide are committed to creating maximum value for telecom operators, enterprises and consumers. Our innovative ICT solutions, products and services are used in more than 170 countries and regions, serving over one-third of the world’s population. Founded in 1987, Huawei is a private company fully owned by its employees.

About Xilinx

Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs, RFSoCs, and 3D ICs. Xilinx uniquely enables applications that are both software defined and hardware optimized – powering industry advancements in Cloud Computing, Video/Vision, Industrial IoT, and 5G Wireless. For more information, visit www.xilinx.com.

Source: Xilinx

The post Huawei Unveils Xilinx FPGA-Powered Cloud Server to North America at SC17 appeared first on HPCwire.

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[mthrynn]

DENVER, Nov. 15, 2017 — Enyx, a world-class pioneer in ultra-low latency FPGA-based technology and solutions, is pleased to announce its enterprise-class TCP/IP, UDP/IP and MAC network connectivity Intellectual Property (IP) Cores for FPGAs and SoCs support for the high-performance REFLEX CES XpressGXS10-FH200G PCIe Board, which features a Stratix 10 GX FPGA from Intel’s new top-of-the-line 14nm Stratix 10 family

Enyx network connectivity IP Cores are addressing the growing throughput and hardware acceleration needs of the datacenter industry and are performing network protocol offloading for applications, such as network security enabled NICs, smart NICs, high performance data distribution, custom packet filtering and high bandwidth bridges. Enyx also provides custom project implementation through Enyx Design Services as part of a complete and customized Smart NIC or Smart Switch solution.

“We are pleased to collaborate with our valued partner REFLEX CES to offer the industry-first TCP and UDP full hardware stacks on Intel’s new, cutting-edge Stratix 10 FPGAs,” says Eric Rovira Ricard, VP Business Development North America at Enyx. “Intel is making FPGA technology ready for data centers, opening new areas for hardware offloading applications in high performance computing, and Enyx is proud to provide the most mature and feature rich network protocol stacks for seamless, FPGA-enabled network connectivity on the latest devices.”

“We are delighted to work with Enyx to offer the best-in-class UDP & TCP IP low latency reference design on our Stratix 10 FPGA board first to market for the Finance and Networking applications, and therefore providing a fast and trusted solution,” said Eric Penain, Chief Business Officer at REFLEX CES.

Enyx nxTCP and nxUDP IP Cores feature full RTL Layers 2, 3, 4 implementations with integrated 40G/25G/10G/1G MAC, compliant with the IEEE 802.3 standards, supporting ARP, IPv4, ICMP, IGMP and TCP/UDP protocols. nxTCP and nxUDP are designed to work seamlessly on Intel (formerly Altera) and Xilinx FPGA and SoC designs. Enyx TCP implementation on Intel Stratix 10 GX devices feature latencies of less than 60 ns in transmission and 110 ns in reception and can also manage up to 32,768 TCP sessions in parallel.

REFLEX CES XpressGXS10-FH200G is the first commercially available PCIe board supporting the 14nm Intel Stratix 10 FPGA family. REFLEX CES XpressGXS10-FH200G PCIe board includes the biggest 2800 KLE Stratix 10 density for processing intensive and various data algorithms with its mix of memory capabilities in DDR4 and QDR2+. It has an optical interface capability of 200Gbit via two QSFP28 cages and uses PCIe gen3 x16. An additional 200Gbit board-to-board interface is provided using a firefly connection. The footprint is compatible with SoC FPGA’s enabled HPS access via the Ethernet interface on the PCIe bracket side. REFLEX CES is a certified board partner of Enyx.

Starting in 2018, the Intel Stratix 10 version downloadable package will be available and will include a reference design for the REFLEX CES XpressGXS10-FH200G PCIe board.

Enyx made this announcement today at the SC17 conference in Denver where it is currently presenting its technology product line and services.

About Enyx

Enyx is a leading developer and provider of FPGA-based ultra-low latency technologies and solutions. Enyx Technology & Design Services division provides design services and connectivity IP cores for FPGA and SoC, for tailored Smart NICs and Smart Switches. Enyx Technology & Design Services division has engaged with over 50 customers world-wide, including hedge funds, exchanges, top-tier investment banks, telecom operators, research labs, universities, and technology manufacturers for the defense, military, aeronautics, aerospace and high-performance computing industries.

For more information, visit www.enyx.com

About REFLEX CES

Recognized for its expertise in high-speed applications, analog and hardened systems, REFLEX CES has become a leading partner with major industrial companies. REFLEX CES simplifies the adoption of FPGA technology with its leading-edge FPGA-based custom embedded and complex systems. REFLEX CES FPGA network platforms enable better flexibility and ease of programming, offering a faster and most powerful board, and reducing the customers’ technology risks and time to market. The company provides FPGA COTS boards for several markets, including the Finance market where Ultra Low Latency capability is a key element, and other markets like Networking.

Source: Enyx

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[mthrynn]

DENVER, Nov. 15, 2017 — On November 13, the fiftieth Top500 Supercomputers list was officially released. China’s Sunway TaihuLight maintained its top position for Four Consecutive years. Followed by China’s Tianhe 2A (Milky Way-2) and Switzerland’s Piz Daint. In terms of vendor share, China’s Inspur ranks third in the TOP500 list with 56 systems.

Major manufactures including Cray, IBM, HPE, Inspur were named to the top500 list. HPE has the lead in the number of installed supercomputers at 122. Inspur takes #3 market share in the ranks and has now 56 systems, up from 20 six month ago, a growth rate of 180%.

Inspur is a leading data center infrastructure provider. The server sales of Inspur ranks #4 worldwide in the second quarter of 2017, according to Gartner. Inspur provides customers with end-to-end high-performance computing solution. It has advanced and mature overall development program and optimization capabilities on HPC. Inspur holds the largest share among China’s Top 100 HPC ranking in 2017, and operates a large amount of supercomputing system in regions including Europe, Asia-Pacific, South America and Africa.

Equipped with the most complete HPC product line, Inspur is a world leader in HPC system design, development and construction, and provides solutions covering air/water-cooled basic structure and two-socket, 4-socket, 8-socket and 32-socket full-line server node products, supporting CPU, GPU, FPGA and other acceleration technologies to meet diverse consumer demands. Inspur also supports applications targeting industrial users. It now has over 300 industrial HPC solutions for such application fields as material sciences, hydromechanics, manufacturing simulation, electromagnetic simulation, weather forecast, oil exploration, cosmic research and genetics. Inspur’s top expert service team provides customers with HPC solution selection, application demand analysis, system architecture design, dedicated technology verification and other professional services to ensure that their solutions are tailored to best customer demands, are easy to use and efficient, helping customers maximize their business development.

About Inspur

Inspur is a leader in intelligent computing and ranked top four in worldwide server manufacturing. We provide cutting-edge hardware design and deliver extensive AI product solutions. Inspur provides customers with purpose-built servers and AI solutions that are Tier 1 in quality and energy efficiency. Inspur’s products are optimized for applications and workloads built for data center environments. To learn more, please visit http://ift.tt/2ap3KHv.

Source: Inspur

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[mthrynn]

Nov. 15, 2017 — Netcope Technologies has recently unveiled a product going by the moniker NP4 (Netcope P4). With it, the company has brought to daylight an entirely new concept of “Firmware as a Service”. With it, FPGA firmware design just became completely outsourceable to anyone who can describe network functions with P4 language.

The P4 programming language is a high level declarative language, so it is much more accessible to network operators who wish to leverage programmable hardware in their solutions, but lack HDL skills. The spread of P4 in the networking industry is being spearheaded by Barefoot Networks and Netcope, as a proud member of P4 Consortium, started to work with P4 immediately after it had been made available to the broader public. P4 to VHDL translator, Netcope’s first P4-related technology, has been announced roughly a year ago.

But the P4 to VHDL translator was just a sneak peek of what Netcope planned to do with P4. Since all of the company’s products are based around FPGA technology, the result expectedly took form of full-on P4+FPGA combo. It is the cloud-based service NP4 that drastically simplifies the process of FPGA programming. Write the P4 code, upload it to the NP4 cloud, wait for the application to autonomously translate the P4 code into a VHDL code and do the firmware synthesis. Then download the firmware bitstream and upload it to your FPGA appliance. That is the process of using NP4 as a customer.

From a broader perspective, NP4 is a representation of the tangible change that the network industry is going to be affected by. It is the “Firmware as a Service” concept. The process of firmware synthesis outsourcing described above can be taken advantage of in 2 major ways. The first way is relevant to those vendors and network operators who don’t have any HDL engineers in their teams and wish to enjoy the flexibility of programmable hardware. The second way is relevant to those who are HDL proficient and prefer to have total control over their solutions, but wish to outsource some parts of the process in order to increase the overall output of their whole R&D operation.

Either way, just about anyone with programmable hardware in their networks can benefit from this new method of reconfiguration of network functions. “In addition to reducing time to market, NP4 brings additional diferentiation to the world of FPGA accelerators. Vendors of FPGA-accelerated appliances can now easily offer completely different feature sets, even if they use very similar hardware platform. We are fully committed to continuously improve the NP4 cloud service, and the list of features and extensions that we plan to add is impressive. In addition, everything in NP4 is designed for throughput of 100 Gbps or more.” says Viktor Puš, CTO of Netcope Technologies.

Source: Netcope Technologies

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ALISO VIEJO, Calif., Nov. 14, 2017 — Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced interoperability between its 12 gigabits per second (Gbps) SAS/SATA host bus adapter (HBA), the Microsemi Adaptec HBA 1100, part of its new Smart Storage adapters portfolio, and Cavium, Inc.’s (NASDAQ:CAVM), ThunderX2 ARM-based central processing unit (CPU). Data center customers looking for a storage adapter solution for Cavium ThunderX2 deployments to support high performance SAS/SATA connectivity can now deploy the Microsemi Adapter HBA 1100 with confidence as a fully qualified end-to-end solution.

“Extensive interoperability testing between Cavium and Microsemi make our Adaptec HBA 1100 the ideal storage solution for Cavium ThunderX2 server deployments,” said Andrew Dieckmann, vice president of marketing for Microsemi. “ARM-based processors are increasingly being considered for next-generation server deployments in the data center due to their performance and power profile advantages for specific data center workloads; this collaboration with Cavium provides data centers with the confidence to make Microsemi their first call when looking to adopt Cavium ThunderX2-based servers.”

According to research firm IDC, the ARM-based server processor market will grow to 10 percent of all server processors shipped by 2021. The Microsemi Adaptec HBA 1100, which leverages the company’s unified Smart Storage Stack, is optimized for software-defined storage (SDS), cold storage and other raw high-performance connectivity applications for data centers, server original equipment manufacturers (OEMs) and server original design manufacturers (ODMs) due to its high performance and flexibility. It provides adapters in a range of port configurations, from 4 to 24 ports, and takes advantage of Microsemi’s latest 28 nm storage controller, the SmartIOC 2100, offering great flexibility and an optimal power profile for these target applications. It also offers support for host-managed and host-aware shingled magnetic recording (SMR) drives as well as broad operating system (OS) driver support, including inbox driver support.

“It is an exciting time in the server processor market, as application workloads continue to become more diverse and performance-intensive,” said Larry Wikelius, vice president Software Ecosystem and Solutions Group at Cavium. “Data centers are looking at the Cavium ThunderX2 to deliver the required performance for cloud and high-performance computing (HPC) deployments, and we are pleased to now offer Microsemi’s Adaptec HBA 1100 as part of our solution set when external connectivity or fan out to internal drives is required.”

Cavium collaborates with Microsemi as part of Microsemi’s Accelerate Ecosystem, which facilitates collaboration between Microsemi and leading firms in the semiconductor integrated circuit (IC), intellectual property (IP), systems, software, tools and design spaces to integrate, test and deliver pre-validated designs and system-level solutions for end customers in Microsemi’s key vertical markets—aerospace and defense, data center, communications and industrial. The Accelerate Ecosystem is designed to reduce time-to-market for end customers and time-to-revenue for Microsemi and ecosystem members via technology alignment, joint marketing and sales acceleration. Learn more at http://ift.tt/2zEcIOtroduct-directory/4194-partners.

The Microsemi Adaptec Smart Storage adapters deliver high performance, low power, reliability and feature-rich solutions tailored to a variety of server storage applications. The combination of the company’s Unified Smart Storage Stack, SmartRAID and SmartHBA, HBA product families and Microsemi’s SXP family of SAS expanders provide a complete server solution for storage management and connectivity.

Product Availability

Microsemi’s HBA 1100 series board-level product family is available in volume production quantities now. For more information, visit http://ift.tt/2hrKPi8torage or contact sales.support@microsemi.com.

About Microsemi’s Product Portfolio for Hyperscale Data Center 

Microsemi is a premier supplier of innovative semiconductor, board, system, software and services for enterprise and hyperscale data centers, enabling high performance, secure, low power and reliable infrastructure for scalable deployments. Microsemi technologies drive innovation in applications including storage systems, server storage, NVM solutions, Ethernet switching, rack scale architecture, data center interconnect, network timing and power subsystems. Building on a track record of technology leadership, Microsemi’s data center infrastructure portfolio is transforming networks that connect, store and move big data, while lowering the total cost of ownership of deploying next generation services.

The portfolio includes high performance NVMe storage controllers, NVRAM drives, SAS/SATA host bus adapters and RAID controllers enabling high capacity storage architectures, high density PCIe switching and firmware for rack scale architectures, PCIe re-drivers, and Ethernet PHYs for intra-rack connectivity. Microsemi’s product portfolio also includes clock and power management, IEEE1588 integrated circuits (ICs) and NTP servers for synchronization across the data center, as well as field programmable gate arrays (FPGAs) and system-on-chip (SoC) FPGAs to perform secure system management of servers and storage. For more information, visit http://ift.tt/1gulvDw/applications/data-center.

About Microsemi 

Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California, and has approximately 4,800 employees globally. Learn more at www.microsemi.com.

Source: Microsemi

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